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| sames SA2532P ONE MEMORY SINGLE CHIP TELEPHONE Key Features * * * * * * * * * * * * * * * * Speech Circuit, LD/MF Dialler and Tone Ringer on one 28 pin CMOS chip Low Noise 31 digit Last Number Redial Line Loss Compensation selectable by pin option 2 Timed Break Recall keys Moving Cursor protocol with comparison On chip MF filter (CEPT CS 203 compatible) Pause key for auto pause or wait function Power down mode Ring frequency discrimination Selectable Loop-Disconnect or DTMF dialling modes Real or complex impedance programmable Soft Clipping to avoid harsh distortion Uses inexpensive 3.58MHz ceramic resonator Operating range from 13 to 100 mA 3 Tone melody generator General Description The SA2532P is a CMOS integrated circuit that contains all the functions needed to form a high performance electronic telephone. The device incorporates LD/MF repertory dialling, melody generation, ring frequency discrimination and a high quality speech circuit. Soft switch into temporary MF mode using * when LD mode is selected .Timed Break Recall will be available in both LD and MF dialling modes. A 31 digit Last Number Redial (LNR) memory, with moving cursor protocol, activated by single key depression. Line Loss Compensation whereby send and receive gains are adjusted (by 6dB) over the ranges selected by the LLC pin. Block Diagram 5M1 hook 2K2 Off On 4 x 1N4004 BSS92 300 6K 680n La 20 30 12V Lb LI 100K 10 + 1u CI LS STB RI + 10u AGND 220K 150K 2N5551 + 2K2 1M Off BC327 CS Line Adaption Power Extraction DC Mask LINE CURRENT SENSE RO1 On + 100u RO2 SA2532P 1K8 VDD M1 10n V DD VSS SOFT CLIP M2 100K 10n 1K8 MO BC547B MELODY SEQUENCER TONE GENERATOR MUTE R4 R3 R2 DIALER 1N4148 12V 330K FC1 RING FREQUENCY DISCRIMINATION CONTROL LOGIC R1 OSC RAM 510 330K Ringer 18V + 220K 10u 10n HS/DP MODE LLC OSC 1K MODE_OUT C1 C2 C3 C4 KEYPAD + 470u 3.58MHz 5V1 DAT_SH05 PDS039-SA2532P-001 Rev. B 21-03-00 SA2532P Package Available in 28 pin DIP. LS RO2 RO1 VDD AGND STB CI MO LLC HS/DP OSC 1 2 3 4 5 6 7 8 9 10 11 28 27 26 25 24 23 RI LI VSS CS M2 M1 MODE FCI R1 R2 R3 R4 C1 C2 SA2532P 22 21 20 19 18 17 16 15 RR 12 C4 C3 13 14 Figure 1 2 /21 sames SA2532P Pin Description Pin # 23 24 3 2 5 28 6 1 27 25 Symbol M1 M2 RO1 RO2 AGND RI STB LS LI CS Function Microphone Inputs Differential inputs for the microphone (electret). Receiver Outputs These are the outputs for driving a dynamic ear piece with an impedance of 100 to 300Ohms Analog Ground This is the analog ground for the amplifiers. Receive Input This is the input for the receive signal. Side Tone Balance Input This is the input for side tone cancellation. Line Current Sense Input This is the input for sensing the line current. Line Input This input is used for power extraction and line current sensing. Current Shunt Control Output This N-channel open drain output controls the external high power shunt transistor for the modulation of the line voltage and for shorting the line during make period of pulse dialling. Positive Voltage Supply This is the supply pin for the circuit. Negative Power Supply Melody Output Pulse Density Modulated output of the melody generator for tone ringer. At high impedance when not active. Frequency Comparator Input This is a Schmitt trigger input for ring frequency discrimination. Disabled during off-hook. Hook Switch Input and Dial Pulse Output This is an I/O that is pulled high by the hook switch when off- hook. An open drain pulls it low during break periods of pulse dialling and flash. Oscillator Input Oscillator pin for Xtal or ceramic resonator (3.58 Mhz). Recommended : Murata CSA 3.58MG312AM 4 26 8 VDD VSS MO 21 FCI 10 HS/DPB 11 OSC 12 9 RR LLC Repetition Rate. Select pin for the repetition rate of the tone ringer's melody output. Line Loss Compensation. Select pin for the line loss compensation: Open None Low 20-50mA High 45-75mA 3 /21 sames SA2532P Pin Description Cont'd Pin # 22 Symbol MODE Function Signalling Mode Select Input Mode pin Function High LD default mode, make/break = 33/66 ms Open MF only Low LD default mode, make/break = 40/60 ms Keyboard Rows 20 19 18 17 16 15 14 13 7 R1 R2 R3 R4 C1 C2 C3 C4 CI Keyboard Columns Complex Impedance Input Input pin for the capacitor in the complex impedance Keyboard Connections C1 C2 C3 C4 R1 MUTE 1 2 3 R2 4 5 6 7 R3 8 9 0 * R4 # PAUSE R R2 LNR ENTER M5 Figure 2 4 /21 sames SA2532P Power On Reset The on chip power on reset circuit monitors the When VDD rises above supply voltage (VDD). approx. 1.2V, a power on reset occurs to assure correct start-up and the LNR register is cleared. Speech Circuit The speech circuit consists of a transmit and a receive path with soft clip, mute, line loss compensation and side tone cancellation. Transmit DC Conditions The normal operating range is from 15mA to 100 mA. Operating range with reduced performance is from 5mA to 15mA. In the operating range all functions are operational. In the line hold range from 0 to 5 mA the device is in a power down mode and the voltage at LI is reduced to maximum 3.5V. The dc characteristic (excluding diode bridge and Pulsing transistors) is determined by the voltage at LI and the resistor R1 as follows: The gain of the transmit path is 35 dB for M1/M2 to LS (see test circuit in Figure 5). The microphone input is differential with an input impedance of 25 kOhms. The soft clip circuit limits the output voltage at LI to 2.0VPEAK. The attack time is 30us/6dB and the decay time is 20 ms/6 dB. When mute is active, during dialling or after pressing the MUTE key, the gain is reduced by > 60 dB. Receive VLS = VLI + ILine.R1 The receive input is the differential signal of RI and STB. The gain of the receive path is 2 dB (see test circuit in Figure 5) with differential outputs, RO1/RO2 . When mute is active during dialling the gain is reduced by > 60dB. During DTMF dialling a MF comfort tone is applied to the receiver. The comfort tone is the DTMF signal with a level that is -30dB relative to the line signal. The voltage at LI is 4.5V. During pulse dialling the speech circuit and other parts of the device not required are in a power down mode to save current. The CS pin is pulled to VSS in order to turn the external shunt transistor on to keep a low voltage drop at the LS pin during make periods. Side Tone Side Tone is controlled along with Return Loss by a Double Balance Bridge as shown in Figure 3. Good sidetone cancellation is achieved by using the following equation: AC Impedance The Characteristic or Output impedance of the SA2532P is set within the IC and adjusted to 600 Ohms. A capacitor may be added to the circuit at pin CI to add a reactive element and make the output impedance complex. R5 Zbal ------ = ---R1 Zline The side tone cancellation signal is applied to the STB input. Oscillator All the Timing Functions of the SA2532P are based on a Clock Frequency of 3.58MHz. A ceramic resonator of this frequency should be connected to the OSC pin. In practice minor deviations from the nominal frequency may occur due to the characteristics of the frequency reference device used and so it is recommended that care is taken in the selection of components. Typically a small value capacitor ( 47pF) may be required to be connected in parallel with the Frequency Reference to ensure start-up and/or operation at the nominal frequency. Line Loss Compensation The line loss compensation is a pin selectable option. When it is activated, the gains of the transmit and receive amplifiers are changed by 6dB in accord with the DC conditions as measured at Pins LI and LS. When the LLC pin is low the adjustment in gain occurs over the range ILINE = 20 to 50mA. When the LLC pin is high the gain range is ILINE = 45 to 75mA.. Note that these values apply for R1 = R30 . When LLC pin is open then the amplifier gains remain fixed regardless of the line current. 5 /21 sames SA2532P RETURN LOSS SIDE TONE Last Number Redial LNR is a facility that allows re-signalling of the last manually dialled number without keying in all the digits again. The LNR is repeatable. A manually entered number is automatically stored in the LNR RAM. The capacity of the LNR RAM is 31 digits. If a number greater than 31 digits is entered, the LNR facility will be inhibited (Until new entries < 32 digits) and further entries will be buffered in a First In First Out Memory (FIFO). Post dialled digits, i.e. digits manually entered after LNR has been invoked, are not stored in RAM but buffered in FIFO. Pauses can be inserted by pressing the PAUSE key. Each pause is 2 seconds when inserted within the first 5 digits otherwise a wait function will halt dialling until PAUSE or LNR key is depressed. In the case of mixed mode LNR operation the redialling is limited to the LD digits so as to prevent unauthorised access to banking passwords etc. LINE RI R1 LI SYN R2 R5 STB Z REF ZBAL VSS ONE COMMON GROUND Recall Function Figure 3 Double balanced bridge (return loss and side tone) with one common ground A Recall activation will invoke a Flash (Timed Loop Break). If Recall is the first entry in a digit string, it will be stored in LNR RAM when digit(s) are entered after the Recall. If the recall key is depressed after a digit string has been entered or dialled out, the recall will not be stored but buffered in the FIFO together with subsequently entered digits. If pressing the recall key is not followed by digit entries, the LNR RAM remains intact. After a recall a 274ms second pause will automatically be executed. Both Recall keys will be functional in both MF and LD dialling modes. Dialling Functions Valid Keys The keypad of the SA2532P comprises a maximum of 17 keys. A Bi-polar scan technique is used so that the 17 keys are scanned in a 4 x 5 matrix using only 8 pins and 1 diode. The key scanning is enabled when HS/DPN is pulled high and VDD is above VREF. A valid key is detected when one and only one contact closure is detected between a Row and Column Pin. Key contacts are debounced to avoid incorrect detection. It is also possible to connect a controller to the rows and columns. Memory Keys The single memory (M5) can be used to directly access a stored number of not more than 21 digits. During programming multiple pauses can be inserted by pressing the PAUSE or LNR key. Each pause is 3 seconds long when inserted within the first 5 digits otherwise a wait function (infinite pause) will be executed until the PAUSE or LNR key is depressed Dial Mode Selection The default mode (LD or MF) can be selected by the Mode pin. When default LD mode is selected, a temporary change to MF can be invoked by pressing the * key. Once in MF mode the MODE OUT pin becomes active. The circuit will revert to LD by pressing either one of the Recall keys or by next on-hook. When MF mode is selected by the mode pin, the circuit can not be changed temporary to LD but will remain in MF. In LD mode the speech circuit will be muted for the duration of the IDP. Mute Function The MUTE key is enabled in speech mode only. Depressing the MUTE key mutes the microphone amplifier. Repressing the MUTE key deactivates the mute (toggle function). Any key entry overwrites a mute activated by the MUTE key and mute will be deactivated. 6 /21 sames SA2532P When privacy mute is activated a reminder tone is applied to the ear piece every 274ms. Tone Ringer The Tone Ringer of the SA2532P incorporates a Discriminator Circuit and a three tone Melody Generator. When a Valid Ring Signal is detected the Melody generator is activated and creates a ringing signal comprising 3 frequencies F1 (1065Hz), F2 (1420Hz) and F3 (1734Hz). These frequencies are repeated in a sequence of 6 time slots constructed by the frequencies Moving Cursor Procedure To accommodate easy and uncomplicated redialling (LNR) behind a PABX, a sliding cursor protocol is implemented. If new entries match the previous RAM contents, pressing the LNR key will dial out the remaining digits. If there is an error in matching, the LNR will be inhibited until next on-hook, and the RAM will contain the new number. DTMF Tones The DTMF generator provides 7 frequencies, namely: F1 F2 F3 F1 F2 F3 The repetition rate allows these six frequencies to be repeated 1,4,7 or 10 times per second and can be set by pin option as follows: Low group Digit 1-2-3 Digit 4-5-6 Digit 7-8-9 Digit *-0-# 697Hz 770Hz 852Hz 941Hz Pin RR R1 R2 R3 R4 OPEN Repetition Rate 1 time 4 times 7 times 10 times disabled High group Digit 1-4-7-* Digit 2-5-8-0 Digit 3-6-9-# 1209Hz 1336 Hz 1477Hz . Ring Frequency Discrimination The Ring Frequency Discriminator assures that signals with a frequency between 13 Hz to 70 Hz are regarded as valid ring signals. When a valid ring signal is detected, the melody generator is activated and remains active as long as the ring signal is present. Once the melody generator has been started, the ring signal is continuously monitored and the melody generator is instantly turned on or off according to the momentary presence of a valid or invalid ring signal respectively (until next POR of off-hook). The MF output levels are -6/-8 dBm and the preemphasis is 2.6dB. 7 /21 sames SA2532P Typical Application Only the components necessary for presenting the complete functions of the SA2532P are included. 5M1 680n 2K2 La On Off 4 x 1N4004 20 BSS92 30 12V 100K 10 300 6K hook Lb 220K 150K 2N5551 Off On 1M BC327 LI CI LS + STB 1u + RI 10u A GND + 2K2 CS Line Adaption Power Extraction DC Mask LINE CURRENT SENSE RO1 RO2 + 100u SA2532P 1K8 V DD V SS V DD M1 10n SOFT CLIP M2 100K 10n 1K8 MO BC547B MELODY SEQUENCER TONE GENERATOR MUTE R4 R3 DIALER 1N4148 12V 330K FC1 RING FREQUENCY DISCRIMINATION R2 R1 CONTROL LOGIC OSC RAM 510 330K Ringer 18V + 220K 10u 10n HS/DP MODE LLC OSC RR C1 C2 C3 C4 KEYPAD + 470u 5V1 3.58MHz Figure 4 SA2532P Operating Procedures The procedures for utilising the features of the SA2532P are optimised out of consideration for the human factor in order to : - Meet the user's expectations - be easy to learn Symbols States Entries Processing ! Idle (on -hook, no ringing) Going Off Hook x sec Time Out (x sec) Speech Mode or Going On Hook Dialling (LD or MF) Privacy Mute TEXT Key Press Storing (writing into RAM) Programming Entering a Number False Programme entry TEXT Processing according to text TEXT Invalid Entry Entry according to Text Reading from RAM TEXT State according to Text 9 /21 sames SA2532P Privacy Mute MUTE any key ! 10 /21 sames SA2532P Temporary MF ! RAM FIFO * FIFO R R FIFO * EXIT FIFO 11 /21 sames SA2532P Last Number Redial (LNR) ! LNR or 12 /21 sames SA2532P Storing A Number ENTER Key entries different to the procedure will be ignored. Exit programme state with ON-HOOK or ENTER Programme State M5 1) ENTER 1) Entries (0-9, *, #, PAUSE, R1, R2) will be stored into the selected memory 13 /21 sames SA2532P Automatic Dialling ! M5 LNR or Post-dialled digits are not stored but buffered in FIFO 14 /21 sames SA2532P Electrical Characteristics Absolute Maximum Ratings Positive Supply Voltage ..................................... -0.3V VDD 7V Input current .................................................................. 25mA Input Voltage (LS) .................................... . ....... -0.3V VIN 10V Input Voltage (LI, CS) .......................................... -0.3V VIN 8V Input Voltage (STB, RI) .............................. -2V VVIN VDD+0.3V Input Voltage (MO) ............................................ -0.3V VIN 35V Digital Input Voltage ................................... -0.3 VIN VDD+0.3V Electrostatic Discharge .................................................. 800V Storage Temperature ....................................... -55 C to +150C Recommended Operating Conditions Supply Voltage * (Speech Mode)............................. 4V VDD 5V Oscillator Frequency (Resonator: Murata CSA 3.58M G300)... 3.58 MHz Operating Temperature ......................................... -10C to +55C * This voltage is generated internally DC Characteristics (ILINE = 20 mA unless otherwise specified) Symbol IDD Parameter Operating Current Conditions Speech mode MF dialling LD dialling VDD = 2.5V Ring mode VDD = 2.5V Idle mode VDD = 2V, TAMB = 25C 15mAILINE 100mA VOL = 0.4V Min Typ 3 4 200 300 0.05 4.5 1.5 Max 5 Units mA mA uA uA uA V mA IDDO VLI IOL Retention Current Line Voltage (default) Output Current, Sink CS,HS/DP,MO Output Current, Source MODE OUT IOh VOh = VDD - 0.4V -1.5 mA 15 /21 sames SA2532P AC Characteristics (ILINE=20mA; f=800Hz unless otherwise specified) Symbol TX ATX ATX/F Parameter Transmit Gain (M1/M2) Variation with Frequency Distortion Soft Clip Level Soft Clip Overdrive Attack Time Decay Time Input Impedance (M1/M2) Mute Attenuation Noise Output Voltage Unwanted Frequency Components Input Voltage Range (M1/M2) Output Driver Input Voltage Range (LI) Dynamic Range Return Loss Receive Receive Gain (RO1/RO2) Variation with Frequency Distortion Soft Clip Level Soft Clip Overdrive Attact Time Decay Time Noise Output Voltage Unwanted Frequency Components Conditions Test Circuit Fig.5 ZRI = 1000 f=500Hz to 3.4kHz VLI0.5VRMS VLI = Min 33.5 Typ 35 0.8 Max 36.5 Units dB dB THD VAGC ASCO tATTACK tDECAY ZIN AMUTE VNO VFC 2 2 20 30 20 20 % VPEAK dB us/6dB ms/6dB k dB dBmp dBm Mute activated 60 -72 50...20 kHZ -60 VIN MAX Differential Single Ended 1 0.5 2 2 VPEAK VPEAK VPEAK VPEAK dB BJT VIN MAX VTX RL RX ARX DARX/F THD VAGC ASCO tATTACK tDECAY VNO VFC ZRL = 600 Ohms Test Circuit Fig.5 ZRL=600 f=500 Hz to 3.4 kHz VRI 0.5VRMS VRI = VRI > 0.8V 15 0.5 2 0.8 3.5 dB dB 2 1 10 30 20 -72 % VPEAK dB us/6dB ms/6dB dBmp dBm 50 Hz...20 kHz -60 16 /21 sames SA2532P AC Characteristics (contd) (ILINE = 20mA; f=800Hz unless otherwise specified) Symbol ZIN VIN RI ST AST VIN ST ZIN Parameter Input Impedance (RI) Input Voltage Range(RI) Sidetone Sidetone Cancellation Input Voltage Range (STB) Input Impedance (STB) Keyboard Key Debounce Time HS Input Low to High Debounce High to Low Debounce DTMF Conditions Min Typ 8 2 Test Circuit Fig.5 VRI 0.5 VRMS 26 2 80 dB VPEAK k Max Units k VPEAK tD 15 ms tHS_L tHS_H Going off-hook Line breaks/on-hook 15 240 ms ms F VMF VL-H THD tTD tITP tTR tTF Frequency deviation MF Tone Level(Low group) Preemphasis Low to High Distortion Tone Duration Inter Tone Pause Tone Rise Time Tone Fall Time LD Note 5 -9.5 2.0 Note 3 Note 1 Note 1 Note 2 Note 2 -8 2.6 1.2 -6.5 3.0 -30 85 85 5 5 % dB dB dBr ms ms ms ms 80 80 82.3 82.3 tDR tM/R tPDP tIDP tMO tFD1 tFD2 tPFP Dial Rate tolerance Make/Break Period Pre-Digit Pause Inter Digit Pause Mute Overhang Flash Duration 1 Flash Duration 2 Post Flash Pause 10 5 5%, MODE=low 5%, MODE=high 800 100 270 274 40/60 33/66 35 840 156 880 102 276 pps % ms ms ms ms ms ms ms ms. 17 /21 sames SA2532P AC Characteristics (contd) (ILINE = 20mA; f=800Hz unless otherwise specified) Symbol tAP Parameter Access Pause Tone Ringer Melody Output Level Melody Delay Frequency 1 Frequency 2 Frequency 3 Detection Time Detection Time-out Min. Detection Frequency Max. Detection Frequency Reminder Tone Level (RO1/RO2) Duration Interval Comfort Tone (DTMF) Level (RO1/RO2) 1022 1363 1664 70 Conditions Min 1.9 Typ 2.0 Max 2.1 Units sec VMO tMD F1 F2 F3 tDT tTO fMIN fMAX PDM 10 1065 1420 1734 Note4 13 71 1107 1476 1803 80 ms Hz Hz Hz ms ms Hz Hz Initial VRT tRDT tRTI Relative to LS -30 82.3 274 dBr ms ms VCT Relative to LS -30 dBr Note 1: The values are valid during LNR dialling and are minimum values during manual dialling, i.e. the tones will continue as long as the key is depressed. The rise time is the time from 10% of final value until the tone amplitude has reached 90% of its final value. Relative to high group. The FCI circuit is reset by the POR and the HS/DPB pulled high (off hook). After a reset the FCI circuit is in a standby state. A positive edge on FCI will initiate the frequency discrimination. Whenever a period of the ring signal is missing, the timer is reset. When a valid ring signal is present for more than one cycle, the melody generator is started and is directly controlled by the ring signal. This condition will remain until a new reset. This does not include the frequency deviation of the ceramic resonator. Note 2: Note 3: Note 4: Note 5: 18 /21 sames SA2532P Test Circuit 21 FCI 1k M1 23 A 10u 1 LS 30 M2 24 Iline 600 28 6 RI STB RO1 3 300 300 UL 6k 680n RO2 GND 2 5 B 10u 27 LI SA2532P C1 25 26 CS VSS CI C2 C3 C4 R1 R2 10 11 3.58MHz 16 15 14 13 20 19 18 17 7 HS/DPN R3 R4 OSC 22 MODE RR 12 MO 8 4 22u 9 LLC VDD 5V6 Figure 5 19 /21 sames SA2532P Typical Characteristics of Line Loss Compensation (f=800Hz, Zline=600Ohm, Vls=-10dBm) Tx Gain 36 35 34 33 dB 32 31 30 29 28 0 10 20 30 40 50 60 70 mA 80 vss vdd open Figure 6 Rx Gain 3 2 1 vss 0 dB -1 -2 -3 -4 -5 10 20 30 40 50 60 70 mA 80 0 vdd open Figure 7 20 /21 sames SA2532P Disclaimer: The information contained in this document is confidential and proprietary to South African Micro-Electronic Systems (Pty) Ltd ("SAMES") and may not be copied or disclosed to a third party, in whole or in part, without the express written consent of SAMES. The information contained herein is current as of the date of publication; however, delivery of this document shall not under any circumstances create any implication that the information contained herein is correct as of any time subsequent to such date. SAMES does not undertake to inform any recipient of this document of any changes in the information contained herein, and SAMES expressly reserves the right to make changes in such information, without notification,even if such changes would render information contained herein inaccurate or incomplete. SAMES makes no representation or warranty that any circuit designed by reference to the information contained herein, will function without errors and as intended by the designer. South African Micro-Electronic Systems (Pty) Ltd P O Box 15888, Lynn East, 0039 Republic of South Africa, 33 Eland Street, Koedoespoort Industrial Area, Pretoria, Republic of South Africa Tel: Fax: 012 333-6021 012 333-8071 Tel: Fax: Int +27 12 333-6021 Int +27 12 333-8071 Web Site : http://www.sames.co.za 21 /21 sames |
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